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IEC 63011-1:2018 ED1

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

Nov 28, 2018

General information

60.60     Nov 28, 2018

IEC

TC 47/SC 47A

International Standard

31.200  

English   French  

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Scope

IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.

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PUBLISHED
IEC 63011-1:2018 ED1
60.60 Standard published
Nov 28, 2018

National adoptions

SSH IEC 63011-1:2018  
DPS

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

60.60 Standard published

DPS/KT 7 more