IEC 62899-402-1 ED2 specifies the measurement methods of the width of line pattern and spaces between the line patterns in printed electronics. These printed line patterns are treated as two-dimensional on a substrate. When the patterns are definitely affected by three-dimensional configurations, these are specified in measurement methods for vertical variance in printed electronics.
This edition includes the following significant technical changes with respect to the previous edition:
a) The title is changed from 'Printability – Measurement of qualities – Pattern width' to 'Printability – Measurement of qualities – Line pattern width'
b) The term 'pattern width' is specified as 'line pattern width'.
c) The measurement method of line pattern space is included.
d) The definition and measurement of inner/outer edge lines are removed.
PUBLISHED
IEC 62899-402-1:2017 ED1
IN_DEVELOPMENT
IEC 62899-402-1 ED2
50.20
Proof sent to secretariat or FDIS ballot initiated: 8 weeks
Feb 28, 2025
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