IEC TR 61189-5-506:2019 ED1

Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-506: General test methods for materials and assemblies - An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501

Publication date: Jun 26, 2019

General information

Current stage: 60.60 Effective date: Jun 26, 2019

Originator: IEC

Owner: TC 91

Type: Technical Report

ICS: 31.180

Languages: English

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Status: Published

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IEC TR 61189-5-506:2019(E) is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. This document sets out to validate the introduction of a new 200-µm gap SIR pattern, and was benched marked against existing SIR gap patterns of 318 µm and 500 µm.

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PUBLISHED
IEC TR 61189-5-506:2019 ED1
60.60 Standard published
Jun 26, 2019